The Society for Electronic Transactions and Security (SETS), under the Office of the Principal Scientific Adviser to the Government of India and in collaboration with Centre for Development of Advanced Computing (C-DAC), launched the “Secure Processor 2026” workshop on March 2, 2026, in Chennai as part of a Ministry of Electronics and Information Technology (MeitY)-supported initiative.
The inaugural session was attended by Shri S. Krishnan, IAS, Secretary of MeitY, along with Shri E. Magesh, Director General of C-DAC, and Shri Manoj K. Jain, Scientist ‘G’ & Group Coordinator, MeitY.
The two-day workshop featured insightful talks and technical discussions delivered by experts from R&D organizations, industry, and academia, focusing on advancements and challenges in secure processor technologies.